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Why we need ICs?\n4. Define the term digital.\n5. Which gate is equal to AND-inverter Gate?\n \n THEORY:\n Circuit that takes the logical decision and the process are called logic gates. Each \ngate has one or more input and only one output. OR, AND and NOT are basic gates. \nNAND, NOR and X-OR are known as universal gates. Basic gates form these gates. \n \n AND GATE: \n\n \n The AND gate performs a logical multiplication commonly known as AND function. \nThe output is high when both the inputs are high. The output is low level when any \none of the inputs is low.\n \n OR GATE:\n \n The OR gate performs a logical addition commonly known as OR function. The \noutput is high when any one of the inputs is high. The output is low level when \nboth the inputs are low.\n \n NOT GATE:\n The NOT gate is called an inverter. The output is high when the input is low. The \noutput is low when the input is high.\n \n NAND GATE:\n The NAND gate is a contraction of AND-NOT. The output is high when both inputs are low \n \n and any one of the input is low.The output is low level when both inputs \nare high.\n \n NOR GATE: \n The NOR gate is a contraction of OR-NOT. The output is high when both inputs are \n \n low. The output is low when one or both inputs are high.\n \n X-OR GATE:\n The output is high when any one of the inputs is high. Using the K-map minimize the function in \nthe sum of products form. Express F in the minimum product of sums form\nc. IC IC 74180 2\n2. IC TRAINER KIT - 1\n3. PATCH CORDS - 30\n \n PRE-REQUEST QUESTIONS:\n 1. Design 2-bit odd parity generator and checker \n2. Need of parity generator and checker \n\n \n 3. Difference between odd parity and even parity\n4. What are parity generator and checker?\n5. Define parity bit.\n \n THEORY:\n A parity bit is used for detecting errors during transmission of binary \n \n information. A parity bit is an extra bit included with a binary message to make the \nnumber is either even or odd. The message including the parity bit is transmitted \nand then checked at the receiver ends for errors. In even parity, the added parity bit will make the total number is even \namount. In odd parity, the added parity bit will make the total number is odd \namount. The parity checker circuit checks for possible errors in the transmission. AND GATE IC 7408 1\n3. OR GATE IC 7432 1\n4. NOT GATE IC 7404 1\n5. IC TRAINER KIT - 1\n6. Thus, code converter is a circuit that makes the two systems \ncompatible even though each uses different binary code. \n \n The bit combination assigned to binary code to gray code. Since each code \nuses four bits to represent a decimal digit. There are four inputs and four outputs. \nGray code is a non-weighted code. \nThe input variable are designated as B3, B2, B1, B0 and the output variables are \ndesignated as C3, C2, C1, Co.The Boolean functions are obtained from K-Map for each output variable. \n \n A code converter is a circuit that makes the two systems compatible even \nthough each uses a different binary code. To convert from binary code to Excess-3 \ncode, the input lines must supply the bit combination of elements as specified by \ncode and the output lines generate the corresponding bit combination of code. \nEach one of the four maps represents one of the four outputs of the circuit as a \nfunction of the four input variables. \n\n \n A two-level logic diagram may be obtained directly from the Boolean \nexpressions derived by the maps. These are various other possibilities for a logic \ndiagram that implements this circuit. X-OR GATE IC 7486 1\n3. IC TRAINER KIT - 1\n4. A full adder is useful to add three bits at \n\n \n a time but a half adder cannot do so. In full adder sum output will be taken from \nX-OR Gate, carry output will be taken from OR Gate.\n HALF SUBTRACTOR: \n \n The half subtractor is constructed using X-OR and AND Gate. The half \nsubtractor has two input and two outputs. The outputs are difference and borrow. \nThe difference can be applied using X-OR Gate, borrow output can be implemented \nusing an AND Gate and an inverter.\n FULL SUBTRACTOR: \n \n The full subtractor is a combination of X-OR, AND, OR, NOT Gates. In a full \nsubtractor the logic circuit should have three inputs and two outputs. The two half \nsubtractor put together gives a full subtractor.The first half subtractor will be C \nand A B. The output will be difference output of full subtractor. Check the results by doing the addition in \n \n decimal.\n7. What is look ahead carry?\n8. Define Negation operation\n9. NOT GATE IC 7404 1\n2. IC TRAINER KIT - 1\n3. PATCH CORDS - 32\n \n PRE-REQUEST QUESTIONS:\n 1. Why we need multiplexer?\n2. Mention the advantage of de-multiplexer.\n3. Compare multiplexer and de-multiplexer.\n4. Draw 2 x 1 multiplexer.\n \n THEORY:\nMULTIPLEXER:\n \n Multiplexer means transmitting a large number of information units over a \nsmaller number of channels or lines. A digital multiplexer is a combinational circuit \nthat selects binary information from one of many input lines and directs it to a \nsingle output line. The selection of a particular input line is controlled by a set of \nselection lines. Normally there are 2n input line and n selection lines whose bit \ncombination determine which input is selected. \n DEMULTIPLEXER:\n The function of Demultiplexer is in contrast to multiplexer function. It takes \ninformation from one line and distributes it to a given number of output lines. For \n\n \n this reason, the demultiplexer is also known as a data distributor. Decoder can also \nbe used as demultiplexer. \n \n In the 1: 4 demultiplexer circuit, the data input line goes to all of the AND \ngates. OR GATE IC 7432 3\n3. PATCH CORDS - 27\n \n PRE-REQUEST QUESTIONS:\n 1. What is encoder?\n2. Why we need decoder?\n3. Compare Encoder and Decoder.\n4. Mention the function of decoder.\n5. Select the role of encoder?\n \n THEORY:\nENCODER:\n \n An encoder is a digital circuit that perform inverse operation of a decoder. An \nencoder has 2n input lines and n output lines. In encoder the output lines \n\n \n generates the binary code corresponding to the input value. In octal to binary \nencoder it has eight inputs, one for each octal digit and three output that generate \nthe corresponding binary code. \n \n In encoder it is assumed that only one input has a value of one at any given \ntime otherwise the circuit is meaningless. It has an ambiguila that when all inputs \nare zero the outputs are zero. The \ninput code generally has fewer bits than the output code. Each input code word \nproduces a different output code word i.e there is one to one mapping can be \nexpressed in truth table.OR, AND and NOT are basic gates. NAND, NOR and X-OR are known as universal gates. Basic gates form these gates. The output is high when both the inputs are high. The output is low level when any The output is low level when The output is high when the input is low. The The output is high when both inputs are low The output is high when both inputs are The output is low when both Logical inputs are given as per circuit diagram. Observe the output and verify the truth table.POS formsIt is denoted in the K-map expression by sigma. ( ? )Using the K-map minimize the function in Also, give the realization using only two input. NAND gates.NAND gates only.The message including the parity bit is transmitted An error is detected if the Since each code There are four inputs and four outputs. Gray code is a non-weighted code. The input variable are designated as B3, B2, B1, B0 and the output variables are To convert from binary code to Excess-3 Each one of the four maps represents one of the four outputs of the circuit as a A two-level logic diagram may be obtained directly from the Boolean These are various other possibilities for a logic Above circuit is called as a carry signal from the addition of the less significant bits A full adder is useful to add three bits at a time but a half adder cannot do so. In full adder sum output will be taken from. X-OR Gate, carry output will be taken from OR Gate.The outputs are difference and borrow. The difference can be applied using X-OR Gate, borrow output can be implemented The two half The expression AB Logical inputs are given as per circuit diagram. Observe the output and verify the truth table.Check the results by doing the addition in The design of half adder, full adder, half subtractor and full subtractor A digital multiplexer is a combinational circuit For this reason, the demultiplexer is also known as a data distributor. Decoder can also In encoder the output lines generates the binary code corresponding to the input value. In octal to binary It has an ambiguila that when all inputs Each input code word In the block diagram of decoder circuit the encoded. If you continue browsing the site, you agree to the use of cookies on this website. See our User Agreement and Privacy Policy.If you continue browsing the site, you agree to the use of cookies on this website. See our Privacy Policy and User Agreement for details.If you wish to opt out, please close your SlideShare account. Learn more. You can change your ad preferences anytime. Hope it will be as much helpful as these useful source HelpWriting.net This service will write as best as they can. So you do not need to waste the time on rewritings.Filter.Amp.Requirement, Frequency Of Oscillation And Amplitude Stabilization.Voltmeter. Amphere MeterTheory. A silicon controlled rectifier (SCR) is a semiconductor device that acts as a true electronic switch. ItIt can control the amount of power fed to theIf the supply voltage is less than. Then increase the supply voltage from zero, a pointUnder this condition, the voltage across the SCR suddenlyIf proper gate current isCharacteristics of DIAC. Aim. To draw the V-I characteristics of DIAC and obtain the break over voltage (VBO).Voltmeter. Amphere MeterA DIAC is a two terminal three layer bidirectional device which can be switched from its offThe operation of DIAC is identical both inThe DIAC does not conduct until the applied voltage of eitherDiac Characteristics. The connections are made as shown in the circuit diagram. First DIAC is connected in forward direction. The input supply is increased in step by step by varying the RPS. The corresponding ammeter and voltmeter readings are noted and tabulated. Then the DIAC is connected in reverse condition. The above process is repeated. Observation. Model GraphCharacteristics of TRIAC. To draw the V-I characteristics of TRIAC and obtain the break over voltage (VBO).Voltmeter. Amphere MeterConnecting Wire. Circuit Diagram. Theory:-. A TRIAC is a three terminal semiconductor switching device which can. Control alternating current in a load. A TRIAC can control conduction of both positive and negative half cycles of. A.C supply. It is sometimes called a bidirectional semiconductor triode switch.The connections are made as shown in the circuit diagram. VMT1MT2 is constant by varying RPS2 and then varying IG by varying RPS1. The corresponding ammeter and voltm eter readings are noted and tabulated. Next the TRIAC is connected in reverse direction. Observation:-VMT1MT2(V)When Triac isAim. Design and realize Inverting and Non-inverting amplifier using 741 Op-amp. Apparatus Required:Theory: An inverting amplifier using opamp is a type of amplifier using opamp where theThe input waveform will beRf is the feedback resistor. Rf and RinInverting operational amplifier gain can be. Negative sign implies that the output signal isThe input and output waveforms of an inverting amplifier using opamp is shown below. ThePractical inverting amplifier using 741. A simple practical inverting amplifier using 741 IC is shown below.It can be used in a verity ofThe IC has an integratedSignal to beNon inverting pin (pin3) is connected toRf and R1 together sets the gainPOT R2 can beIf you are planning to assemble the circuit, theNoise from the power supply can adverselyWhen assembling on PCB it is recommended to mount the. IC on the board using an IC base. In the inverting amplifier only one input is applied and that is to the inverting input (V2)Vin The negative sign indicates the output voltage is 1800 out of phase with respect to the inputPractical Non-inverting amplifier using 741. The input is applied to the non-inverting input terminal and the Inverting terminal is connected to. Procedure:-Apparatus Required:Theory. Differentiator circuits as its name implies, performs the mathematical operation of differentiator,The differentiator may be constructedThus, the output Vo is equal to the Rf C times the negative instantaneous rate of change of theCapacitor current moves through the feedback resistor, producing a drop across it, which is theA linear, positive rate of input voltage change will result in a steadyConversely, a linear, negative rate of input voltageThis polarity inversionCircuit Diagram. Procedure:Model Graph:-. Result: Wave forms shows differentiator is a high pass filter.Apparatus Required:-Theory:-. A circuit in which the output waveform is the integral of the input wave is the integrator. Such aIf the feedback resistor Rf. Where C is the integration constant and proportional to the value of the output voltage Vo at timeThe convenient way to introduceThe circuitIf the op-amp isThe input voltage passes a current through the resistor and series capacitor, which charges orBecause the resistor and capacitor are connected to a virtualFurthermore, the capacitor has a voltage-current relationship governed by the equation:Procedure:-Model Output:-. Integrator in Simulator Design:-. Result: Waveforms shows integrator acts as low pass filterUsing 741 Op-amp. Apparatus Required. Theory. Adder (Summing Amplifier). Op-amp may be used to perform summing operation of several input signals in inverting inThe input signals to be summed up are given to invertingIf the input to the inverting amplifier is increased, theOutput is a linear summation of number of input signals. Each input signal produces a component of the output signal that is completely independent ofIf we connect the inputs to non inverting terminal then the adderSubtractor. The basic difference amplifier can be used as a subtractor. The signals to be subtracted areThe two inputs are. If all external resistance is equal inCircuit Diagram:-. Procedure:Adder:-. Subtractor:-. Simulated circuit diagram:-. Model Waveforms:-. S.No V1 V2 Theoretical. Practical. Vout. VoutAim. To analyze the effect of varying frequency to the output voltage of low-pass and high-Component and Equipment:-. Oscilloscope. Function generatorTheory:-. In electronic communications systems, it is often necessary to separate a specific rangeThis is normally accomplished withThere are for basic types of filters:Frequencies above the cutoffIn this experiment, you will study low-pass and high-pass filters. Circuit Diagram:-High Pass Filter:-. Observation:-Aim. To understand the behavior of Wein-Bridge Oscillator and RC Phase Shift Oscillator inComponents required:-. Theory:-The designer must think some approach that pullsNote that externallimiterPlease remember that at least two time constants is the generalIdeal gain requirement for Wein bridge oscillator is 3 and for RCProcedure:-. Without Amplitude stabilizationWith Amplitude StabilizationNow customize the name of a clipboard to store your clips. They are familiar with the usage of a hardware-oriented description language (VHDL) to describe and to design integrated circuits and systems. Teaching method: Students are free to work on their own, according to their own scheudule on the laboratory tasks. Students can work on the labortaory either in institute rooms or at home. An advisor is available who will support them in case of siginificant difficulties. Dr. sc. techn. Gerhard Kramer. June 2013 Publisher: Dept.The main GUI interface of EWB Using Electronics Workbench for Design You may use EWB to: 1- Explore ideas and test preliminary circuits. 2- Refine circuits to full layout ( If circuit requires parts of a previous design) 3- Export files in format used by PCB (Printed Circuit Board) layout packages as move from design to production. Connecting Wires To attach an instrument to a circuit, point to a terminal on its icon so it highlights and drag a wire to a component.After that make the following changes - Connect the output of the converter to the red probe - Connect the Vcc line to the input of the inverter - Start simulating the circuit State your observation down: Observation: - In the same circuit above, stop the simulation and connect the ground to the input of the inverter. State your observation down: Task 6: Simple circuit; a clock source wi th a red probe Draw the following circuit and simulate it. Write down your observations. Notice that the clock (from Sources toolbox) frequency is 2 Hz. Note: You can change the default values of the clock by doing mouse right clicking on the clock and click on the “Component Properties.” as shown below: Write down your observations. Notice that the clock frequency is 2 Hz. Task 8: EWB Menu Name the following icons and state down their functions AND and NAND gates This gate gives high output (1) if all the inputs are 1’s.The truth table for the circuit appears in the logic converter's display. The two inputs of the gate are attached the A and B inputs of the logic converter. The circuit output C is connected to Out line of the logic converter. After clicking on the Truth Table button of the logic converter, the logic converter tries all possible combinations of the circuit input and derives its truth table. Task 6: Finding the truth table of a gate using the logic converter Repeat what you did in task 5 for the NOR gate. Show your connections in the circuit below.Show your connections in the circuit below. Note: you can obtain a three-input AND gate by drawing a regular two-input AND gate and then changing its Number of Inputs property as shown next. To learn how to directly convert a Boolean expression to circuit. ? To learn how to analyze a given digital logic circuit by finding the Boolean expression that represents the circuit. To learn how to analyze a given digital logic circuit by finding the truth table that represents the circuit. C’ The above function is implemented in the following digital logic Circuit Now after drawing the circuit above using EWB we find that its truth table is as shown below ( notice that logic 1 means connect the input to the Vcc line, and logic 0 means connecting the input to the ground) A B C Z 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1 Task 2: Circuit analysis Find the Boolean expression that repr esents the outputs x and y shown in the following circuit. Find out the truth table of the circuit. Finally, click on the follo wing but ton that will generate the simplified form of the equation. To draw the circuit after simplification, you need to click on the fol lowing button, this will realize the simplified expression u sing basic gates. Background The NAND gate represents the complement of the AND operation. Its name is an abbreviation of NOT AND. The graphic symbol for the NAND gate consists of an AND symbol with a bubble on the output, denoting that a complement operation is performed on the output of the AND gate. The NOR gate represents the complement of the OR operation. Its name is an abbreviation of NOT OR. The graphic symbol for the NOR gate consists of an OR symbol with a bubble on the output, denoting that a complement operation is performed on the output of the OR gate. A universal gate is a gate which can implement any Boolean function without need to use any other gate type. The NAND and NOR gates are universal gates. In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC digital logic families. In fact, an AND gate is typically implemented as a NAND gate followed by an inverter not the other way around!! Likewise, an OR gate is typically implemented as a NOR gate followed by an inverter not the other way around!! Implement any gate with NAND gates only To build an inverter ( NOT gate) using a NAND gate: All NAND input pins connect to the input signal A gives an output A’. An AND gate can be replaced by NAND gates as shown in the figure (The AND is replaced by a NAND gate with its output complemented by a NAND gate inverter). An OR gate can be replaced by NAND gates as shown in the figure (The OR gate is replaced by a NAND gate with all its inputs complemented by NAND gate inverters).